December 10, 2024

Taylor Daily Press

Complete News World

AMD Introduces New EPYC Server Processors and Instinct MI200 Accelerators – Computer – News

AMD has teased EPYC CPUs and Instinct MI200 accelerators for servers and supercomputers. CEO Lisa Sue posts a photo showing the producers. An official announcement will follow on November 8.

Sue posted the photo on Twitter. The photo shows a system that combines two EPYC processors and eight instinct accelerators. The system has sixteen dimmers per socket. It can be concluded that EPYC CPUs will again support eight memory channels. CPUs and accelerators are supposed to be connected to each other like Infinity Fabric. Other than that, there’s not much to learn from humor.

The CEO also confirmed again that AMD will announce new server processors and accelerators on November 8. a company Wait for that date An event to announce new data center products, 5:00 PM NST.

MI200 Instinct in Epyc Milan-X

Among other things, AMD is expected to introduce the Instinct MI200 series of its accelerators, which are rumored to consist of the MI250 and MI250X. AMD previously mentioned the term “Instinct MI200” in the URL of a teaser video of its data center event, but that reference is delete now.

The upcoming Instinct cards will be based on the Aldebaran GPU, based on AMD’s CDNA 2 architecture. Accelerators will likely have an MCM, or Multi-Chip-Module, design. Multiple chipsets are integrated, just like the two-core chipsets in AMD’s Ryzen processors. Trusted AMD Leaker executable It was reported in late October that the Instinct MI250X will get 110 compute units with a boost clock of 1.7GHz, as well as 128GB of HBM2e memory and a TDP of 500W.

See also  Monsanto must pay €2 billion to an American man who blames cancer on the use of the herbicide Roundup

The upcoming EPYC CPUs will likely be Milan-X models. These are based on the Zen 3 architecture, just like current EPYC CPUs, but they get a 3D cache. This means that the incoming server CPUs should have a total of 768MB of L3 cache. That could mean that the eight “core pools” of the upcoming EPYC CPUs contain 32MB of regular L3 cache, as well as 64MB of 3D V-Cache. executable Specifications for upcoming CPUs have already been published.

AMD EPYC Milan-X potential lineup (via executable)
Model Cores/Threads clock speed Boostclock Tdp L3- cache
EPYC 7773X 64 C/128 T 2,20 GHz 3.50 GHz 280 W 768 MB
EPYC 7573X 32C/64T 2,80 GHz 3,60 GHz 280 W 768 MB
EPYC 7473X 24 c / 48 t 2,80 GHz 3.70 GHz 240 watts 768 MB
EPYC 7373X 16C/32T 3.05 GHz 3.80 GHz 240 watts 768 MB